Matt Rhodes, CEO
Matt Rhodes brings a proven track record of leading business and product development teams through the process of developing advanced communication ICs through to market winning positions. Prior to joining Teranetics, Matt was the President of Conexant Systems where he was responsible for the marketing, engineering and operations of a communication IC business of nearly $1 billion annually. During his tenure at Conexant, the teams he led held or developed significant IC product positions in a variety of communications technologies including dial-up modems, xDSL, Wireless LAN and Digital Broadcast Satellite.

Previous to Conexant, Matt Rhodes served as Director of VLSI technology at Pacific Communication Sciences, Inc, a wireless system development company that pioneered communication IC products for PHS handheld phones, Secure Digital Radio and Cellular Packet Data. He received an M.B.A. from the Anderson School of Management at the University of California, Los Angeles. He also holds an M.S. in Electrical Engineering from Lehigh University and a B.S. in Physics from Pennsylvania State University.


Sanjay Kasturia, Co-Founder, CTO & Chairman
Sanjay Kasturia has more than 20 years of experience in the communications industry. Sanjay is currently editor-in-chief for the IEEE task force developing the Energy Efficient Ethernet standard. Before starting Teranetics, Sanjay co-founded Airgo Networks, now a part of Qualcomm, which developed wireless LAN ICs that significantly increased the range and reliability of networks using multi-antenna signal processing technology.

Sanjay has previously served as Vice President Advanced Technology at Raychem's Telecommunications, Energy and Industrial Division, focusing on telecommunications and access network electronics. Before Raychem, Sanjay was at Lucent Technologies as R&D Director for its Global Wireless Products Group and earlier as head of Wireless Technology Research for Bell Laboratories. He holds a B.S. in Electrical Engineering from Indian Institute of Technology, Kanpur, and M.S. and Ph.D. in Electrical Engineering from Stanford University. Sanjay is a Fellow of the IEEE.


Rahul Chopra, Co-Founder and Vice President, Business Development & Operations
Rahul Chopra brings proven experience in developing product and marketing strategies for new products including the Total Control 1000 platform at USR/3COM, the voice over packet module for the Meridian family of products from Nortel, and OPS-INE for SONET at Bellcore. Prior to Teranetics, Rahul led Business Development at Iospan Wireless, a premier broadband wireless technology company, and was instrumental in its sale to Intel.

Rahul earlier led 3COM's entry into multi-service platforms with the Total Control family of products. Rahul also led Mergers and Acquisitions teams for the Carrier line of business at 3COM. Prior to 3COM, Rahul held senior product management and engineering positions at Nortel Networks, GTE, and Bellcore. Rahul has authored two patents and holds a M.S. in Computer Science from Clemson University.


Jose Tellado, Co-Founder and Vice President, Systems Engineering
Jose Tellado is an expert in broadband communication systems specializing in high performance transceiver design and implementation. Jose was editor of the PCS section of the 10GBASE-T standard. Prior to Teranetics, Jose was the Modem Architect at Intel’s Broadband Wireless Access group. As an employee-founder and Director of Technology at Iospan Wireless, Jose was the chief designer of the innovative MIMO-OFDM AirBurst™ technology at Iospan (acquired by Intel).

Earlier, while at Stanford University, Jose proposed new advanced methods for Multi-carrier Modulation (DMT/OFDM) in the areas of Peak to Average Power Ratio Reduction and Multi-user Transmit Optimization. Jose has also consulted for Apple Computer’s Advanced Technology Wireless group and Globalstar in the areas of Wireless LAN and Low-Orbit Satellite cellular systems respectively. He is the author of 15 IEEE publications, 10 standards contributions and the book “Multi-carrier Modulation with Low PAR: Applications to DSL and Wireless" published by Kluwer. Jose holds MS. and Ph.D. degrees in Electrical Engineering from Stanford University.


Kamal Dalmia, Vice President, Product Marketing
Kamal Dalmia has extensive experience in the communication industry spanning three generations of Ethernet products. Prior to joining Teranetics, Kamal was Director of Product Marketing at Marvell. At Marvell, he led the marketing team for industry leading Ethernet transceivers and was instrumental in success of several Gigabit, 10 Gigabit and Fast Ethernet physical layer products.

Previously, Kamal held various management and engineering positions at Cypress Semiconductor and PMC Sierra, focusing on PHYs for Ethernet, Fibre Channel, Infiniband, SONET and ATM. He holds several US patents and a master’s degree in Electrical Engineering from the University of British Columbia.


Sridhar Begur, Vice President, ASIC Engineering
Sridhar Begur brings more than 20 years of experience in the design of complex integrated circuits and has contributed a number of successful products including multimedia processors for PCs and the industry’s first MIMO based wireless LAN (802.11 a/b/g) ASIC. Prior to Teranetics, Sridhar worked at Airgo Networks leading their WLAN ASIC development.

Before Airgo, Sridhar held senior positions at Diamond Multimedia, Media Vision, Chips and Technologies, HP and Intel where he managed a variety of IC designs. He has seven patents issued or pending. Sridhar holds a B.S. from Bangalore University and a M.S. from the South Dakota School of Mines & Technology, both in Electrical Engineering.

Bhupendra Ahuja, Vice President, Analog IC Design Engineering
Bhupendra Ahuja brings more than 25 years of experience in Analog IC design and has developed a large number of products spanning Telecom, PC, ADSL line drivers, Digital Camera, SONET transceivers and Precision Analog ICs.

Prior to Teranetics, Bhupendra held senior design management positions at Intersil, Exar, C-Cube, NeoMagic, Intel and AT&T Bell Labs. He holds B.S. in Electrical Engineering from I.I.T., Kanpur, India and M.S. and Ph.D. (EE) from Carleton University, Ottawa, Canada. Bhupendra has published over 25 technical papers and holds 19 patents in the area of CMOS Analog IC designs. Bhupendra is the inventor of “Ahuja Compensation” a novel frequency compensation technique widely used for CMOS operational amplifiers. In 2006, he was elected IEEE Fellow for his contributions to integrated circuits for telecommunications and computer communications systems.